Simulation and Optimisation of Parasitic Impedances and EMI Behaviour of New Power Electronic Hardware Concept

Diploma Thesis, 2005
88 Pages, Grade: 1,0



1 Introduction
1.1 New Drive Hardware Concept
1.2 Need for EMC Simulations

2 Simulation Methods and Modelling
2.1 Parasitics
2.1.1 Influence of Parasitics on Switching Behaviour
2.1.2 The PEEC Method
2.1.3 Introduction to FastHenry
2.1.4 Parasitics Extraction of a Representative Structure
2.2 Conducted Transient Characterization
2.2.1 The SPICE Method
2.2.2 Introduction to SIMetrix
2.2.3 Switching Behaviour Analysis of an Representative Structure
2.3 Radiation Characteristic
2.3.1 Introduction to FLO/EMC

3 Component Simulations
3.1 Package Parasitics Extraction
3.1.1 µPP
3.1.2 TO220
3.1.3 EconoPACK+
3.1.4 Comparison
3.2 Switching Behaviour Analysis
3.3 Emission
3.3.1 Modelling of µPP
3.3.2 Emission Simulation Setup
3.3.3 Emission Simulation
3.3.4 Conclusion

4 2Cool System Simulations
4.1 Package Parasitics Extraction
4.2 Switching Behaviour Analysis
4.3 Emission
4.3.1 General simulation description
4.3.2 Simulation Interpretation
4.3.3 Simulative Investigations

5 Experimental Validation
5.1 General
5.2 Double Pulse Test Setup Simulation
5.3 Experimental Investigations
5.4 Comparison

6 Conclusion


This diploma thesis presents methods and results of the simulative characterization of the electromagnetic compatibility (EMC) behaviour of a new low voltage motor drive hardware concept. The concept consists of double side cooled discrete semiconductor packages, which are integrated in a new power stage hardware topology. The overall EMC behaviour of such a drive is characterized by the semiconductor properties and additionally by two main factors: package parasitics and electromagnetic emission.

Firstly, the switching behaviour of the drive is influenced by package parasitics that can cause transient voltage peaks. These peaks do not only lead to increased electromagnetic emission, but also influence the power losses, the voltage de-rating and therefore the silicone usage within the package. The characterization of the package parasitics is therefore an important task within the design phase of the drive. The methods and results of the parasitics extraction and switching behaviour analysis of both the discrete semiconductor package (µPP) and the new power stage hardware topology (2Cool) are presented within this thesis.

Secondly, the electromagnetic emission caused by the drive was investigated through a numerical EMC field simulation program. With the aid of the various simulation result analysis and visualization possibilities of the EMC simulation program, it was possible to investigate the near and far electromagnetic fields as well as the current densities including eddy currents. The EMC characterisation and the optimisation of the 2Cool system are presented as well.

Finally, an experimental validation of the achieved simulation results is demonstrated with the aid of a standard double pulse test. The comparison of simulation and experimental data shows a high level of agreement.


Diese Diplomarbeit präsentiert die Methoden und Ergebnisse der simulativen Untersuchung der elektromagnetischen Verträglichkeit (EMV) eines neuen Frequenzumrichters. Das Konzept besteht aus doppelseitig gekühlten, diskreten Leistungshalbleitergehäusen, die in eine neue Verschienungstopologie integriert sind. Das EMV Gesamtverhalten eines solchem Umrichters wird außer durch die Halbleitereigenschaften zusätzlich durch zwei Hauptfaktoren beeinflusst: die parasitären Elemente des Kommutierungspfades und die elektromagnetische Abstrahlcharakteristik.

Erstens wird das Schaltverhalten des Umrichters durch die parasitären Elemente des Kommutierungspfades beeinflusst, die transiente Spannungsspitzen hervorrufen können. Diese Spannungsspitzen führen nicht nur zur Erhöhung der elektromagnetischen Abstrahlung, sondern beeinflussen auch die Leistungsverluste, die Spannungsbelastung des Schalters und somit die Siliziumausnutzung. Die Beschreibung der parasitären Elemente des Kommutierungspfades ist daher ein wichtiger Bestandteil während der Entwicklungsphase des Umrichters. Die Methoden und Ergebnisse der Extraktion der die parasitären Elemente und die Schaltverhaltenanalyse des diskreten Halbleitergehäuses (µPP) und der neuen Verschienungstopologie (2Cool) werden in dieser Diplomarbeit vorgestellt.

Zweitens wurde die durch den Umrichter verursachte elektromagnetische Abstrahlung mit einem numerischen EMV Simulationsprogramm untersucht. Mit Hilfe der verschiedenen Möglichkeiten zur Analyse und Visualisierung der Simulationsergebnisse war es möglich das elektromagnetische Nah- und Fernfeld sowie die Stromdichte inklusive Wirbelströme zu untersuchen. Die EMV Charakterisierung und Optimierung des 2Cool Systems werden nachfolgend präsentiert.

Die experimentelle Gültigkeitsprüfung der durch die Simulationen erhaltenen Ergebnisse wird abschließend anhand eines Standarddoppelpulstests gezeigt. Der Vergleich der Simulations- und Messergebnisse zeigt ein hohes Maß an Übereinstimmung.

1 Introduction

Nowadays, power electronic components and devices can be found in any device, where the conversion, control and conditioning of electric power are necessary. In motor drive applications, a frequency converter is used to provide the conversion of the grid current into a variable frequency output current in order to control the rotation speed of a driven motor. The performance of the drive is influenced by several factors, such as switch technology, packaging, converter design, cooling efficiency and control.

In order to improve cost and performance of new generation power electronic systems a new concept was proposed, which is introduced in details in Section 1.1. The concept combines double side cooled discrete semiconductor packages that are integrated in a new power stage hardware topology.

With the development of a first technology demonstrator, the investigation and optimisation of electromagnetic aspects through simulations is an important task. The influence of the new package structure on the switching behaviour and the EMC performance was investigated with the aid of simulation tools.

The applied simulation methods and the modelling procedure are presented in Chapter 2. The results achieved through the simulations are presented in Chapter 3 and Chapter 4 for the double side cooled power semiconductor µPP (Micro Press Pack) and the converter concept 2Cool (Double Side Cooled Power Stage), respectively. Chapter 5 presents the double pulse test that was carried out to verify the results achieved through the simulations. The conclusions in Chapter 6 summarize the results achieved within this diploma thesis.

1.1 New Drive Hardware Concept

This section introduces the new double side cooled power semiconductor µPP and illustrates its integration into the structure of the new drive hardware concept 2Cool.

The basic idea behind the µPP is to combine advantages of different packaging classes in one package. Discrete packages, such as the transistor outline (TO) packages, are low cost devices for low power applications, which are simply contacted to a printed circuit board (PCB) by solder pins. Another package class contains the so-called Press Packs. Their two opposing terminals are used for both electrical and thermal connections, which makes them robust and suitable for highest power levels.

The structure of the µPP is shown in Fig. 1-1. The insulated gate bipolar transistor (IGBT) and the free wheeling diode die are integrated between the collector and emitter plane. The planes are both the contact for the main commutation path through the package and the interface for the thermal connection to heat sinks. The auxiliary pins assure simple integration to a PCB. The distance between the auxiliary pins is dimensioned in order to assure the voltage clearance such as to reach target voltage levels. In comparison with other packages, where the IGBT emitter is connected through wire bonds, the µPP avoids this “bottle neck” and has no wire bonds in the power path. Only the control terminals are wire bonded.

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Fig. 1-1: Structure of µPP.

The structure of the µPP combines the simple contacting method of the TO package with the short commutation path and the double sided cooling of the Press Packs.

The special design of the µPP enables a new power stage hardware topology. The schematic of a 2-level 3-phase inverter with its five different potentials is shown in Fig. 1-2. Insulation between these potentials is needed in order to avoid short circuits.

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Fig. 1-2: Schematic of 2-level 3-phase inverter with marked potentials.

The figure also depicts that the collectors of the high side, the emitters of the low side and the emitters and collectors of the corresponding phase output can be connected together, since they are on same potential.

The combined thermal and electrical connection of same potentials of the 2-level 3-phase inverter is the basic idea behind the new power stage hardware topology, which will be referred to as the 2Cool system.

The structure of the 2Cool system with the embedded µPPs is described in Fig. 1-3. The 2Cool system consists of five heat sinks that provide both cooling and electrical connection of the switches. The µPPs are attached to a gate driver board located between the heat sinks. The insulation between the direct current (DC) and the phase heat sinks is provided by air and epoxy plates. The µPPs are additionally sealed with a foam rubber frame in order to prevent pollution from the cooling air stream. The heat sinks are surrounded by an electromagnetic shield that also acts as the air flow channel, since the 2Cool system will be cooled by active convection provided by a fan. The spring rods provide an optimal clamping force for electrical and thermal connection between the µPPs and the corresponding heat sinks. The electrical connection between the 2Cool system and its environment is provided by contact pieces that fit on the heat sinks. Two brackets take the mechanical forces and fix all parts in place.

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Fig. 1-3: Structure of the 2Cool system.

The introduced structures of the µPP and the 2Cool system are used for the upcoming simulations.

1.2 Need for EMC Simulations

The abbreviation EMC stands for “Electromagnetic Compatibility” and is defined as: “Ability of a device, unit of equipment or system to function satisfactorily in its electromagnetic environment without introducing intolerable electromagnetic disturbances to anything in that environment [1].” The definition illustrates that both immunity and emission affect the electromagnetic compatibility of a system. The disturbances that can be received or sent out by a system are radiated and conducted. The tolerated magnitude and the frequency range of these disturbances are defined in standards, such as IEC, CISPR and EN. In order to sell a product it needs to comply with the applicable standards, depending on the product class, the place of installation and the country of use.

This means that any manufacturer of electric products has to carry out compliance tests in order to assure that his product is compliant with the corresponding standards. One way of testing the compliance of new products is to build up prototypes and measure the performance based on the standards. Due to the fact that prototyping is time consuming and expensive a big demand of alternatives exists.

One alternative is to assess the EMC behaviour in advance by EMC simulation tools. The advantage of such tools is that results can be achieved in a shorter time period, depending on the complexity of the device. The impact of design changes through mechanical, electrical and thermal adjustments on the EMC behaviour can easily be considered with the aid of EMC simulation tools.

Within this diploma thesis different simulation tools are presented that help to characterize the overall EMC behaviour of the 2Cool system. Their different purposes and their applied simulation methods are explained in Chapter 2.

2 Simulation Methods and Modelling

This chapter describes the simulation methods and tools that were used for the electromagnetic (EM) characterization of the µPP and the 2Cool system.

The parasitics extraction of packing structures is a fundamental part of this thesis. Section 2.1 gives an overview about the need for parasitics extraction and describes the tools that were used to analyse the µPP package and the 2Cool system. The procedure applied to extract the parasitics is explained by means of a representative structure.

The result of parasitics extraction is an equivalent inductance and resistance matrix that can be used to investigate the switching behaviour of a package. The package parasitics also include parasitic capacitances. For the investigated structures these parasitic capacitances are small and are therefore not taken into account. With growing switching speed the influence of parasitic capacitances needs to be considered.

A simulation program with integrated circuit emphasis (SPICE) was used to carry out the transient analyzes, including the inductance matrix. The SPICE method and the circuit simulation program SIMetrix are explained in Section 2.2. Based on an example, the procedure used for the switching behaviour analysis is explained.

Section 2.3 explains the background and the functionality of the EMC simulation program FLO/EMC (Flomerics). FLO/EMC was used for EM field simulation in order to characterize the overall EMC behaviour of the 2Cool system.

2.1 Parasitics

2.1.1 Influence of Parasitics on Switching Behaviour

Power semiconductor switches are integrated into packages that provide electrical connection and insulation, thermal connection and mechanical integration. Higher complexity levels can be reached by grouping several switches in parallel or series in one package. Different power semiconductor packages are available on the market. Their packaging concept depends on their power and insulation class.

In all packages, semiconductor dies are connected to additional structures, such as wire bonds, pins, cooling plates and cases. These structures consist of conducting or insulating materials that are integrated in the geometry of the package. A conducting structure, for example an aluminium wire bond, has a specific resistance and a self-inductance. This inductance causes inductive coupling to other inductances in its environment. The wire bond can therefore be modelled as a lumped resistance in series with a lumped inductance and with corresponding coupling to other modelled structures.

These passive components are called parasitics, because they are unwanted, but unavoidable. They occur while adding necessary structures to the package and therefore influence the overall switching behaviour of the component/package system

Fig. 2-1 shows an IGBT with its freewheeling diode and the main parasitics of the package: the inductances for the collector-to-emitter (blue), gate-to-auxiliary emitter (black) and the common emitter current path (red) are drawn, including the inductive coupling between the collector and the gate (green).

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Fig. 2-1: Main parasitics of IGBT/Diode package.

The inductance values and the coupling are of special interest, because their influence on the switching behaviour of the IGBT can be important. The resistive parasitics are affecting the losses and the DC current path.

The collector-to-emitter inductance LCE describes the main commutation path through the module. With Eq. 2-1, higher inductances lead to higher voltage peaks. Voltage peaks are being avoided for several reasons such as: power losses, voltage de-rating, IGBT damage and EMC.

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Eq. 2-1

The gate-to-auxiliary emitter inductance LGxE is also critical; the larger the loop area and the inductance are, the higher the inductive coupling gets. Due to this effect, disturbances can be induced on the IGBT gate-emitter voltage.

LE_Shared describes the emitter inductance shared with the main commutation path. Any main current switched on LE_Shared induces a voltage (positive or negative) on the gate-emitter voltage, again causing disturbances.

A current through the main commutation path can also disturb the gate signal by the collector-gate coupling kGC. This coupling is critical, since any current in neighbouring conductors can influence the switching behaviour.

The mentioned effects induced by the parasitics have different influences on the overall performance of the switch. Voltage peaks, for example, can damage the IGBT if they exceed the IGBT breakdown voltage. Besides that, the voltage peaks increase the switching losses in the IGBT, making the thermal budget more critical.

The mentioned effects and their consequences show the importance of investigating the parasitics of the components as early as the design stage of a package development process. The high complexity of the problem requires a simulation tool that helps to identify critical structures of the power semiconductor switch and further characterize their influence on the overall switch performance. This can be done by using the PEEC (Partial Equivalent Element Circuit) method.

The following sections explain the PEEC method and the general functions that were applied to obtain convincing results in the parasitics description of the investigated power semiconductor packages and the new inverter concept.

2.1.2 The PEEC Method

The PEEC method was developed by A. E. Ruehli at the IBM Research Centre in New York, and was first introduced in 1971 [2]. Ruehli describes the method to calculate inductances for complex structures. Since its invention, the method was continuously developed and additional extensions were added, such as calculation of non orthogonal geometries [3].

In 1970 simple inductance calculations were mainly used in power engineering applications, but with the investigation of microcircuit applications the need for precise inductance calculations in multiconductor structures was growing. The analysis of the electrical properties of multiconductor systems is fundamental to system synthesis and optimisation.

The PEEC method is based on the theory of partial inductances that establish a relationship between incomplete loops and closed loops. The method is valid for all structures with dimensions that are small compared to the wavelength of the highest frequency. This condition is called quasi-stationarity.

The approach presented in [2] starts with the definition that an N loops system has inductances. The system is then discretized into segments along the length and the width of the structure. The lines dividing the conductor into partial inductances are called inductive partitions. The inductance can then be related to the geometry by using the magnetic vector potential A, which is generated by a current in the loop. If a uniform current density across the cross section ax of the conductor is assumed, the magnetic flux can be easily associated to the magnetic vector potential. By using the Neumann formula, which is a special case for the inductance of thin filamentary circuits, the inductance can be calculated by using Eq. 2-2.

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Eq. 2-2

The equivalent circuit for a given structure can be obtained by forming an N x N inductance matrix, where the elements are evaluated by Eq. 2-2. The off-diagonal terms of this L matrix are called mutual inductances, while the diagonal terms are called self inductances. It is assumed that the current in all conductors is uniform or that the current crowding effects are small. Investigations showed that the influence of current redistribution through eddy currents at high frequencies is small on the change in inductance values, except in situations where the conductors are in close proximity. The length of a bend in a wire is usually small compared with the conductor length, hence the current distribution in the corner regions is insignificant for practical calculations and the approximations can be applied.

To approximate when the current crowding through eddy currents becomes important usual skin effect calculations can be used, shown in Eq. 2-3.

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Eq. 2-3

The skin effect current distribution can be calculated by considering the partial mutual inductances in and between wires. If uniform currents are assumed, interactions exist that will force the currents to adjust to approximate the true skin effect distribution. Proximity effects are also considered by the interaction of the mutual inductances [4].

It was shown that it is possible to calculate the inductance of a closed loop. It is obvious that an open loop cannot support a current and therefore no unique flux is associated with a segment of the wire. Nevertheless, there is a way to calculate the inductance by considering the partial inductances of the structure. The open loop inductance is therefore calculated as the closed loop inductance with the partial inductance of the closing path removed.

The PEEC method has one general advantage compared to other methods such as the Finite Elements Method (FEM), which is that only structures must be discretized, but not the surrounding space. The FEM demands also a meshing of the space between structures to calculate coupling and interaction effects, such as the proximity or skin effect. This allows the PEEC method to calculate results in less computation time, because the number of calculation steps is much smaller. On the other hand two simplifications are necessary to use the PEEC method. First, retardation is neglected, which means that fields need no time to propagate from one point to another point in space. Second, the already introduced quasi-stationarity needs to be fulfilled. Time dependent fields can be described by models derived from static field calculations [5].

The potential of the PEEC method is obvious and was already noticed by various software developers, which integrated this method in their programs. Programs that provide parasitics extraction are for instance PCBMod by SimLab Software GmbH [6] and HENRY™ by OEA International Inc. [7]. For the parasitics extraction that was carried out within this thesis, the freeware tool FastHenry [8] was used.

2.1.3 Introduction to FastHenry

FastHenry is a parasitics extraction program that uses the introduced PEEC method. It was developed by the Computational Prototyping Group at MIT [8]. The program uses so called fast algorithms to reduce required memory and computation time. This section describes the basic functionality of FastHenry.

The PEEC method is an adequate technique to extract the parasitics of a three-dimensional structure. It was intended for geometries that could be represented with a few hundred volume filaments. However, complex structures currently used in power electronics can require up to ten thousand filaments to be accurately analyzed. A direct evaluation gets extraordinarily computationally expensive for these large problems. The computation time and memory required would grow with n3, where n is the number of volume filaments. Therefore new algorithms were introduced, whose computational cost grows slower with problem size [9].

A hierarchical multipole algorithm was implemented into FastHenry. The approach given in [9] shows that the equivalent inductance of a filament can be expressed by using the magnetic vector potential A. Each filament can also be precisely identified with a scalar electrostatic potential due to a collection of filament charges. The evaluation of these electrostatic charges can be accelerated with the hierarchical multipole algorithm. The inductance can be calculated in order b operations, where b is the number of charges.

Accurate approximations for the charges can be computed in many fewer operations using multipole expansion. It is also possible to compute charges in close proximity by using local expansion. Both operations exploit that the dimensions of the investigated structures are small compared to their distance. When filaments are very near to each other, a multipole expansion representation would lead to excessive errors, so the interaction is evaluated directly. Direct evaluations are also used when the computation time required to build the multipole and local expansions exceeds the direct evaluation costs. A hierarchical multipole algorithm is therefore a combination of multipole and local expansion evaluations, along with a single set of direct evaluations. The explained algorithms illustrated that a parasitic extraction can be substantially accelerated with hierarchical multipole algorithms.

A complete description of the fast multipole algorithm is quite lengthy and is therefore avoided. The reader is referred to the relevant literature [9].

The presented parasitics extraction program FastHenry is a non-commercial tool. It does not provide model import or graphical model input. The geometries are defined in a text input file. The input file can be visualized with FastModel, which creates a three-dimensional view. The input files programming, the three-dimensional visualization and the solving of the structure are three different processes. A Graphical User Interface (GUI), called Equivalent Parameter X-tractor (XPEq), based on the script language PERL was therefore programmed at ABB combining all the different processes.

The next section describes the procedure required for the parasitics extraction for a simple example.

2.1.4 Parasitics Extraction of a Representative Structure

This section explains the procedure used for the parasitics extraction. A simple example was chosen in order to simplify and accelerate the modelling process.

At the beginning of each modelling process the investigated structure needs to be defined. For the example explained in this section, a structure is modelled that appears often during investigations on power semiconductor packages. The structure is shown in Fig. 2-2. An IGBT is placed on a collector plane. The gate is connected through a wire bond from a gate plane that represents the gate pin of the package. The geometric dimensions are given in the sketch.

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Fig. 2-2: Sketch of example structure.

The current paths and different potentials need to be allocated. The Fig. 2-3 shows the corresponding node definition and current paths.

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Fig. 2-3: Node definition and current paths of example structure.

After the preparation phase, the actual modelling process begins. The XPEq GUI provides the next steps until the parasitics extraction simulation. A screenshot of the GUI is shown in Fig. 2-4.

The input file for FastHenry is created using a PERL script. The advantage of this procedure is that repeating processes, such as description of parallel wire bonds, can be accelerated by using “for-loops”. Other standard programming algorithms provide faster modelling of complex structures. Once the script is completed it is easy to change parameters, such as wire bond thickness.

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Fig. 2-4: XPEq GUI.

The collector and gate planes were modelled by defining three points in a Cartesian coordinate system. The segmentation of these planes can be adjusted by the user. Planes are handled as two dimensional (2D) structures, where 2D means the current flows in two dimensions from every node of the plane. The nodes which define the current path must be extracted out of the created planes.

The wire bond is modelled as a one dimensional (1D) structure, meaning that the current flows in just one dimension from each node. For its description, three nodes were defined and connected with segments. The wire bond input node was set equal with the gate plane output node to provide a current path to the chip. The chip was not included in the parasitics extraction, since it will be modelled during the subsequent transient analysis simulations in SPICE.

The current paths are defined by using the nodes and creating ports for each possible connection. For the introduced structure, two ports needed to be defined.

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Fig. 2-5: FastHenry input file.

Once the script is written, it creates the FastHenry input file that is shown in Fig. 2-5.

The input file lists the defined planes and the extra defined plane nodes. The port definition is further shown at the end of the input file. The geometry described in the input file can be visualized by using FastModel. The 3D view of the structure is shown in Fig. 2-6.

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Fig. 2-6: 3D view of modelled structure.

As explained in Section 2.1.2 the extraction of the parasitics is done by creating a resistance and an inductance matrix. The solved and merged matrix for the introduced structure is shown in Table 2-2.

Table 2-1: Solved parasitics matrix

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With the aid of XPEq it is possible to compile the matrix into a SPICE compatible model library (Table 2-2).

Table 2-2: SPICE compatible model library

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The inductance (LZ) and resistance (RZ) values for each defined port can be read out of this model library. The coupling between the inductances is given by KZ. Additionally a current-controlled voltage source is given by HZ to model mutual resistances in the cases of shared conductors.

The explained example illustrates that the size of the model file increases rapidly with increasing number of ports. The model library can be imported into a SPICE environment and simulations can be carried out considering the parasitics of the package. The switching behaviour analysis procedure is explained in 2.2.3.

The results that were achieved with the aid of FastHenry are presented in Section 3.1 and Section 4.1.

2.2 Conducted Transient Characterization

The parasitics extraction is the first step to an overall system characterization. In order to analyze the impact of the parasitics on the switching behaviour of a system, the parasitics are imported into a SPICE environment. The following sections describe the functionality of SPICE based circuit simulation programs and introduce the tool SIMetrix, which is used for the transient analysis within this thesis. The inductance matrix of the representative structure introduced in 2.1.4 will be used to explain the switching behaviour analysis procedure.

2.2.1 The SPICE Method

SPICE is an acronym for Simulation Program with Integrated Circuit Emphasis and was inspired by the need for a method to test and tweak circuit designs before the expensive fabrication process. Researchers at the Electrical Engineering and Computer Sciences Department of the University of California at Berkeley [10] developed this computer program during the mid-70s. It has now become the standard computer program for electrical and electronic simulation [11].

The original SPICE program has given rise to a variety of commercial implementations. It is available from many vendors who have added schematic drawing tools to the front end and graphics post processors to plot the results. SPICE simulators and applications have expanded to analogue and digital circuits, microwave devices, and electromechanical systems. The majority of commercial packages are based on SPICE2 version G6 although development has now progressed to SPICE3.

SPICE is used to provide a reasonably detailed analysis of circuits containing active components such as bipolar transistors, field effect transistors, diodes and lumped components such as resistors, capacitors and inductors. SPICE calculates voltages and currents static (Bias Point), versus time (Transient Analysis) or versus frequency (AC Analysis) for a given circuit. Most SPICE programs also perform other analysis like sensitivity, noise and distortion [12].

Basically, SPICE operates by reading a netlist and performing the requested analysis. The netlist can be created by text file input or by the translation of graphical symbols in a schematic editor into the equivalent netlist. The results of the analysis are stored in a file, which can be used for graphical visualization. The DC calculations are based on Kirchhoff's current and voltage law. The transient analysis is extended by equations that describe the compensation processes for active and lumped components. The solution for all analysis is calculated by approximation techniques using the introduced basic equations. The user can adjust simulation variables, such as simulation time, maximum time step and maximum tolerance.

The transient analysis program based on the SPICE method that was used within this thesis is called SIMetrix and will be introduced in the next section.

2.2.2 Introduction to SIMetrix

SIMetrix is a mixed-mode circuit simulation package designed by Catena Software Ltd. [13]. SIMetrix combines a SPICE simulator , schematic editor and waveform viewer into one program.

SIMetrix has two main advantages compared to other SPICE based circuit simulation software. One advantage is its convergence behaviour, since convergence is often a problem with many simulators especially in power electronics. This is because the wide range of currents, voltages and conductances present in power circuits stretches the precision of the underlying algorithms. Many other products, such as OrCAD PSPICE, require the user to experiment with various option settings. The SIMetrix core algorithms and model equations make simulations converge also for very complex circuit simulations.

The user friendly import of model libraries is the second advantage of SIMetrix. In addition to the inductance matrices, model libraries for IGBTs also need to be imported. This is possible in a few easy to learn steps. The model import for the well known and widely distributed circuit simulation program OrCAD PSPICE is a lot more complicated and requires file work.

These advantages and the availability of SIMetrix lead to the decision to use this program for the transient analyses including the inductance matrices.

2.2.3 Switching Behaviour Analysis of an Representative Structure

The switching behaviour analysis in SIMetrix of the structure presented in the previous section supports the understanding process for the upcoming, complex transient analysis simulations.

The SPICE compatible inductance matrix file that was obtained by the parasitics extraction in 2.1.4 was imported into SIMetrix. An easy to use drag and drop function provides the link between the inductance matrix file and the SIMetrix model library index. In order to use the inductance matrix in the schematic editor of SIMetrix, a symbol needed to be defined. The pins of the symbol were defined in order of the port definition of the inductance matrix file. The inductance matrix was included into the following simulation.

The influence of the inductance matrix on the switching behaviour can be shown with two simple simulations. First, the switching behaviour of a single IGBT including the inductance matrix was analyzed. The corresponding schematic is shown in Fig. 2-7.

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Fig. 2-7: Schematic for switching analyses of IGBT including inductance matrix.

The following example does not illustrate a real setup, but helps to illustrate occurring coupling effects. Therefore a resistive load was added in the collector-emitter path.

The collector current IC=100A through the IGBT is given by the source V1 with V=1kV and the resistor RColl=10Ω. The gate-emitter voltage is provided by the pulse voltage source V2 with VMin=-15V and VMax=15V. The rise and fall time was set to tRise/tFall=18ns. The gate resistor was set to the small value RGate=1Ω in order to avoid delays and therefore smaller coupling effects. The collector-emitter voltage VCE, the gate-emitter voltage VGE and the collector current IC were monitored by equivalent probes to identify the coupling process.

The simulated turn on of the system is shown in Fig. 2-8. Due to the fast changing current through the IGBT during the turn on process, a voltage is induced on the gate-emitter voltage. A voltage peak of VPeak=585mV can be seen on the gate-emitter voltage. This peak is caused by the coupling effects between the collector and gate path. The simulated turn off of the system is shown in Fig. 2-9.

In order to show the impact of the inductance matrix, a second simulation was carried out without the inductance matrix. The corresponding curves are shown in Fig. 2-10 and Fig. 2-11. There is no voltage peak on the gate-emitter voltage.

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Fig. 2-8: Collector current IC (blue), gate-emitter voltage VGE (red) and collector-emitter voltage VCE (green) for turn on of IGBT with inductance matrix.

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Fig. 2-9: Collector current IC (blue), gate-emitter voltage VGE (red) and collector-emitter voltage VCE (green) for turn off of IGBT with inductance matrix.

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Fig. 2-10: Collector current IC (blue), gate-emitter voltage VGE (red) and collector-emitter voltage VCE (green) for turn on of IGBT without inductance matrix.

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Fig. 2-11: Collector current IC (blue), gate-emitter voltage VGE (red) and collector-emitter voltage VCE (green) for turn off of IGBT without inductance matrix.

The simulation of the representative structure explains the procedure that is used to characterize the impact of a given structure on the switching behaviour. However, the analysis gets more complex with increasing complexity of the structure.

The results that were achieved with the aid of the transient analysis in SIMetrix are presented in Section 4.2 and Section 5.2.

2.3 Radiation Characteristic

The earlier sections have described the tools and methods used for the characterization and impact of packaging parasitics on the switching behaviour. The focus of these methods is to describe conducted and inductively coupled disturbances. In order to sell a product, it is necessary to comply with common standards for radiated emission and immunity. The standards that have to be considered are given in Section 1.2.

Since prototyping of power electronic systems is very expensive and time consuming; simulation tools can be used to describe the emission behaviour of a system. With the aid of such a simulation program it is possible to identify geometry resonances, to validate shielding efficiency and to improve the overall EMC performance.

The EMC simulation program that was used within this thesis is FLO/EMC (Flomerics). Its general functionality is described in the following section.

2.3.1 Introduction to FLO/EMC

FLO/EMC is a three dimensional (3D) EMC field solver program of Flomerics Inc. [14]. It provides calculation of shielding effectiveness, component shielding, electromagnetic interference (EMI), conducted noise and radiated emission.

Two basic algorithms are used for calculation of EMC problems. Complex near fields are calculated by using the 3D transmission line matrix method (TLM). Boundary problems are calculated by solving the Maxwell equations. Therefore FLO/EMC is using a localized, non-uniform Cartesian grid, where the mesh-lines are orthogonal to each other. Due to the non-uniformity of the grid, the cell sizes are adjusted automatically to the needs of the solver and differ according to the position of the cell in the 3D solving region. Fig. 2-12 shows such a grid that was used for modelling the µPP geometry.

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Fig. 2-12: Localized, non-uniform Cartesian grid (grid lines – black, geometry lines – blue).

The cells are modelled as intersections of orthogonal transmission lines. Sources are modelled as transmission lines with voltage pulses which then scatter at the nodes and transmit to neighbouring cells. With this modelling, the TLM solver provides an equivalent circuit model of the electromagnetic field, where the electric and magnetic fields are calculated from the voltages and currents in the transmission lines.

FLO/EMC also provides the use of smart parts, which represent a detailed geometry while simplifying the grid. Hence, complex geometries can also be calculated in a computationally efficient manner. The smart parts will be explained in more details in Section 4.3.

The setup for the simulation is located in a solving region, whose size is automatically adjusted by FLO/EMC. The solver will calculate the simulation results in that region by using the TLM. After defining the geometries and their materials, the simulation parameters such as frequency range and simulation duration, are adjusted. First the TLM solver calculates the broadband system solution in the time domain and provides the simulation result in the frequency domain by using Fast Fourier Transformation (FFT). The simulation duration has a major influence on the solution, because the system energy pulse caused through the excitation needs to decay on a minimum and constant level.

There are different tools offered that help the user interpret the results. In the beginning, monitor points can be added to the model. These monitor points provide E- or H-field versus frequency diagrams. Through the position of the monitor points, the near or far field values can be measured. Monitor points can also be placed outside the solution space. The grid density does not increase, since the fields are calculated based on the Maxwell equations. The program further provides surface current, E- and H-field plots for predefined output frequencies. Geometries that cause resonances can be identified by analysing the corresponding field plots.

Several advantages are given for the use of a TLM solver like FLO/EMC. First, a broad band solution can be obtained with just one simulation. Second, it is ideal for calculation of mixed field, wire and circuit problems. Finally, the localized non-uniform Cartesian grid provides less grid density and therefore less computation time. This advantage gets even clearer if we compare the TLM solver to a solver that uses FEM. The most common cell shape in FEM solver based simulation programs is tetragonal. In order to mesh long structures several of these cells need to be used to avoid acute angels, which would lead to massive calculation errors. The same structure can be easily meshed with a few cells within a TLM solver based simulation program. A FEM based meshing, therefore, increases the grid density and the computational effort compared to the TLM based solvers.

The simulations that were carried out with the aid of FLO/EMC are presented in Section 3.3 and Section 4.3

3 Component Simulations

3.1 Package Parasitics Extraction

This section presents simulation results for three basic power electronic packages including the µPP.

First, the new power package µPP was modelled by using mechanical computer aided design (CAD) data. Next, a TO220 package was investigated, since its basic structure and dimensions are similar to the µPP, although the effective power is typically much smaller than in the µPP. Last, a single switch element (1 IGBT + 1 Diode) of an eupec EconoPACK+ six pack module was modelled to show the parasitics of packages in an equivalent power class.

A cross comparison is shown at the end of this section to point out the advantages of the µPP.

3.1.1 µPP

The model and the main paths for the parasitics extraction of the µPP package are shown in Fig. 3-1.

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Fig. 3-1: Model and parasitics paths for µPP.

The model shown was simplified so that the pins, the wire bonds and the emitter plane are considered as 1D structures. The parasitics extraction provided the results shown in Table 3-1.

A model sensitivity analysis was carried out by varying geometry parameters in order to observe the range of validity of the resulting model. The analysis showed that the parameters depicted in Table 3-1 change just slightly for wide geometry changes. The analysis is not shown in detail.

Table 3-1: Results of parasitics extraction of µPP package

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Although the parasitics for the auxiliary emitter and the auxiliary collector were extracted, these will not be taken into consideration for the comparison with other packages, because the main current flows through the emitter and collector plane.

3.1.2 TO220

The TO220 package was chosen for the parasitics extraction, since its basic structure is similar to the structure of the µPP. It should be considered that the power class of the modelled TO220 (VMax=630V, IMax=15A) is much lower than the power class of the µPP (VMax=1200V, IMax~100A).

Fig. 3-2 shows the model and the main paths used for the extraction of the parasitic elements. Further the real attachment height is marked with the dotted line.

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Fig. 3-2: Model and parasitics paths for TO220.

In order to show the influence on the parasitics the whole pin length values were additionally extracted. The equivalent parasitic values are shown in Table 3-2 and in Table 3-3, respectively.

Table 3-2: Results of parasitics extraction of TO220 package (Pin length = 6mm)

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Table 3-3: Results of parasitics extraction of TO220 package (Pin length = 14mm)

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The comparison of Table 3-2 and Table 3-3 shows the major influence of the pin length on the parasitics, which double with the double pin length. The values for the real attachment height were used for the comparison with the µPP.

3.1.3 EconoPACK+

Fig. 3-3 illustrates the inner structure of an EconoPACK + package as manufactured by eupec. The red circle marks the single switch diode combination that was used for the parasitics extraction. It will be referred to as ECONOSWITCH.

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Fig. 3-3: Inner structure of EconoPACK+ and marked single switch ECONOSWITCH.

Fig. 3-4 shows the model used and the main paths used for the extraction of the parasitic elements.

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Fig. 3-4: Model and parasitics paths for ECONOSWITCH.

The results of the parasitics extraction for the ECONOSWITCH are summarized in Table 3-4.

Table 3-4: Results of parasitics extraction of ECONOSWITCH package

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The smallest emitter inductance values for diode and IGBT path were taken into consideration for the comparison with the µPP and the TO220 package.

Although the presented parasitic extraction of the single switch diode combination is not a practical configuration, it still shows the potential use of the PEEC method in extracting the parasitics of such packaging technologies.

3.1.4 Comparison

Fig. 3-5 summarizes the main parasitics introduced in Section 2.1.1 for all three investigated package types.

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Fig. 3-5: Comparison of main parasitics for investigated power electronic packages types.

The main advantage of the µPP as compared to a switch with similar package technology (TO220) and a switch with similar power class (ECONOSWITCH) is it’s much lower inductance for the main commutation loop and a minimized shared inductance between the main commutation loop and the gate-emitter loop.

3.2 Switching Behaviour Analysis

The parasitics extraction results for the µPP were presented in the previous section. The simulations showed that the values for the parasitics are very small. A switching behaviour analysis considering the achieved parasitic values was carried out, but due to the small values, the influence of the parasitics was difficult to determine.

An experimental proof of the simulations that only considers the µPP parasitics is difficult to realize and has not been carried out. The experimental proof of the simulations is shown with the aid of a double pulse test, which is introduced in Section 5.

3.3 Emission

Besides the parasitics extraction for the new power semiconductor package µPP, radiation simulations were carried out with the aid of FLO/EMC. The program FLO/EMC was introduced in Section 2.3.1. The aim of the simulations was to pre-characterize the emission behaviour of the µPP and to identify structures that might lead to high radiation levels.

This section presents the emission simulation setup and the results of the emission analysis.

3.3.1 Modelling of µPP

Fig. 3-6 shows the modelled µPP in the result viewer Flomotion. The single parts of the model such as the emitter plane and the auxiliary pins were imported from existing Solid Works CAD data with the aid of FLO/MCAD.

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Fig. 3-6: 3D model of µPP in result viewer Flomotion.

Due to the orthogonal structure of the grid, volumes are modelled as cuboids or prisms. FLO/MCAD provides the conversion of complex volumes into simpler structures by dividing them into cuboids or/and prisms that fit the original volume. The degree of simplification can be adjusted by the user. For complex structures such as round wire bonds, this leads to a large number of orthogonal volumes that form the original volume, hence the grid density increases drastically. This leads to a much longer computation time for a single simulation and slows down the actual result process, although the influence of the wire bond geometry is small. Therefore further simplifications were implemented while modelling the µPP.

The wire bonds are marked in Fig. 3-6. They are modelled by using just three cubic segments. This simplification drastically decreased the grid density. Furthermore, the solder stop (green) was not considered during the simulation, because its influence as a dielectric material was assumed to be small.

3.3.2 Emission Simulation Setup

For a basic characterisation of the electromagnetic emission of the µPP a simulation was carried out as shown in Fig. 3-7.

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Fig. 3-7: Sketch of simulation for emission characterization.

For the simulation, a switching state was chosen where the IGBT is conducting and the diode is blocking. For this case, the IGBT was given a conductivity of γIGBT=7.068960e+003 S/m. An electric circuit was attached to make a current flow through the µPP. The broadband voltage source has a voltage of V=1000V and an impedance of R=10Ω. This gives a current of I=100A. These values represent the operation point of the module in its later application. In order to close the electric circuit, one face of the solving region was defined as a ground plane and the wires were connected to that ground plane. The advantage of this method is that the current in the ground plane will not affect the current distribution inside the µPP as much as a parallel wire. This influence is caused by the magnetic field generated by the flowing current. The disadvantage is that the resulting electric field will be influenced by the ground plane.

Two copper contact volumes were added to the setup in order to create a homogenous current spread in the collector and emitter plane of the µPP. This fits the actual conditions when the µPP is connected through a sandwich structure in its later application.

For the emission simulation, eight monitor points were defined as shown in Fig. 3-8. The monitor points MPTop and MPPin represent critical geometry structures in the near field. The other six monitor points represent the far field in the main coordinate directions in a distance of 3 meters to the module.

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Fig. 3-8: Monitor point definition for µPP.

3.3.3 Emission Simulation

The emission simulations were carried out after the modelling process and the parameter definition was completed. Fig. 3-9 shows the electric field versus frequency for the near field monitor points. The maximum electric field strength is at f=427.7MHz.

Fig. 3-10 shows the electrical field plot for the described simulation in the result viewer Flomotion. The result shows the peak values for the electric field at the frequency f=427.7MHz in the y-Layer.

The figure depicts the field strength along the wires and a field enhancement around the contact volumes. The boundary electric field is more intense on the left side, where the ground plane is defined. A strong electric field that is caused mainly by the µPP pins is marked.


[1] LCE is not the math sum of LC and LE, but was extracted with the model. The resulting deviation is caused by the numerical error occurring to small inductance values with the simplified model.

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Simulation and Optimisation of Parasitic Impedances and EMI Behaviour of New Power Electronic Hardware Concept
Otto-von-Guericke-University Magdeburg  (Institut für Elektrische Energiesysteme (IESY))
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Parasitics, EMC, Simulation, PEEC, Inductance, Optimizatio
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Philipp Karutz (Author), 2005, Simulation and Optimisation of Parasitic Impedances and EMI Behaviour of New Power Electronic Hardware Concept, Munich, GRIN Verlag,


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