Thus output current is directly proportional to I x Fig.4. shows the circuit implementation of and I y and inversely proportional to I b . In this I b is current-mode multiplier/divider. It is based on constant equal to 10µA [6]. forcing transition from triode region to saturation region and vice versa in transistor M N4 , M N6 , M ^N10 and M N12 .Transistor M N2 , M N8 , M N10 and M N16

Figure 4. Current-mode multiplier/divider

I z is output current so we can write as: C. High frequency four quadrant current multiplier:

I

approach and continuous time approach [4]. The Hence output current is:

multiplier based on switched capacitor approach has

continuous time approach. In this approach transistor could be biased in weak or strong inversion region.

I K b aI I )] ² (10) III. RESULTS AND DISCUSSION

across transistor M n3 , I 9 is current across transistor dissipation of low voltage CMOS current mode

M n9 , I 10 is current across transistor M n10 . multiplier is less as compared to other circuit. Fig.6. I 01 is combination of I 2 and I 3 and I 02 is shows that d.c. transfer characteristics of analog combination of I 9 and I 10 multiplier are linear with 10μA input range and input voltage is 3.5V. Fig.7. shows that d.c. transfer

I 02 and is given by