Decimation Lowpass Filters for SIGMA-DELTA Modulators - A Comparative Study

University of Rhode Island
Technische Universität

Decimation Lowpass Filters for SIGMA-DELTA Modulators - 
A Comparative Study

Master Thesis

by

Rüdiger Kusch

1998

Abstract
The purpose of this thesis is to compare several filter topologies used for the decimation of sigma-delta modulated digital signals. The goal is to present optimized filter architectures with regard to an effcient VLSI implementation. A fifth-order 1-bit sigma-delta modulator using local feedback techniques will be considered as the front-end A/D converter. The subsequent digital filter reduces the sampling rate by a factor of 32. The decimation filter must guarantee a narrow transition band between 0.5 and 0.55 and stopband attenuation of 100dB.

Chapter 1 provides a brief introduction into the principles of digital signal processing. The considerations are focused on FIR filters due to the requirements for acoustic applications.

Chapter 2 illustrates the proposed overall structure and the design ow.

The objective of chapter 3 is to present the principles of oversampling data converters using sigma-delta techniques. The 5V fifth-order ED^*-modulator with 90dB dynamic range (SNR+THD) will be presented, which has been fabricated in 1.2µm CMOS technology. For the sake of simplicity and robustness, a 1-bit quantizer will be used.

Chapter 4 deals with typical hardware realizations of digital filters. Apart from the \brute force" implementation of the multirate filter with identical filters running in parallel, also the LUT-based approach for small filter orders will be presented. Due to the advantages of compact implementation, the bit-serial approach and the bit-serial multiplier are investigated in detail.

In chapter 5 the straightforward one-stage multirate FIR filter will be introduced. To satisfy the specifications, a 4096 tap lowpass FIR filter will be designed. The in uence of coeffcient quantization is investigated and furthermore the \block scaling" method, to represent small values, is presented. The single-stage implementation becomes the more unattractive the higher the filter specifications are.

Chapter 6, therefore, focuses the investigations on cascaded structures. The first stage is realized as a comb or sincK filter and decimates by a factor of 8 or 4. The frequently used conventional comb filter will be used but also a new architecture will be described. The new structure is based on the conventional comb filter with filter sharpening techniques to improve the frequency behavior. The unavoidable passband droop must be compensated for by the following lowpass FIR filter. In order to compare several filter realizations, three examples are considered. These are the comb-FIR cascade, the sharpened comb-FIR cascade and the sharpened comb-half band filter cascade. Finally, the FIR filter realization using periodically time-varying coeffcients (FIR-PTV filter) will be considered.

Decimation Lowpass Filters for Sigma-Delta
Modulators - A Comparative Study
Thema der vorliegenden Studienarbeit ist der Vergleich und die Aufwandsabschätzung verschiedener digitaler Dezimationsfilter für den Einsatz bei A/DWandlern nach dem Sigma-Delta Prinzip.

Den Anfang macht eine Einführung in die Grundlagen der digitalen Filtertechnik sowie der Sigma-Delta Modulation. Anschlieend werden die Möglichkeiten der Harwareimplementierung prinzipiell vorgestellt. Im Hinblick auf eine VLSI Implementierung, ist jeweils der Hardwareumfang abgeschätzt worden.

Als Referenz dient das unkaskadierte FIR Dezimationsfilter. Die hohen Anforderungen, ein schmales Übergangsband (0.5; 0.55) und eine Sperrdämpfung von 100dB, machen ein Filter der Ordnung 4096 nötig. Das Frequenzverhalten wurde mit Routinen aus den Matlab Toolboxen bestimmt. Es ist der Einfluß einer Koeffzientenquantisierung mittels Simulation gezeigt worden. Eine minimale Koeffzientenwortlänge von 22 Bit konnte ermittelt werden. Das blockweise Skalieren von kleinen Koeffzienten wurde an einem Beispiel verdeutlicht. Die Realisierung des Filters ist in einer Multiraten-Architektur vorgeschlagen worden.

Den Hauptteil der Studie stellen die Filterkaskaden dar. Es wurde das Frequenzverhalten für drei Kaskaden ermittelt. Die erste Stufe ist in jedem Fall ein sincK (Comb) Filter. Ferner wurde eine modifizierte Comb-Filter Struktur untersucht, mit der eine Frequenzgangformung möglich ist. Für beide Strukturen wurde der Implementierungsaufwand abgeschätzt. Das nachfolgende FIR lowpass Filter kompensiert den \passband droop" im Signalband. Der zu erwartende Substratbedarf lät sich an Hand der Filterlänge abschätzen. Ferner wurden die Vorteile eines Halbband-Filters bei der Dezimation für diese Anwendung aufgezeigt. Die Realisierung des FIR Filters ist mit konventionellen MAC Bausteinen möglich. Eine alternative Realisierungsform ist die FIR-PTV Struktur (periodical time-varying coeffcients), welche abschlieend beschrieben wurde.

Contents

Abstract ... ii
Acknowledgments ... v
List of Symbols ... vi
Table of Contents ... vii
List of Tables ... xi
List of Figures ... xiii

1 Introduction ... 1
1.1 The z-Transform ... 1
1.2 Digital Filter Fundamentals ... 2
1.3 Decimation Filters ... 5
1.3.1 Multistage Decimation Filters ... 9
1.4 Comb Filters ... 11
1.4.1 Cascaded Comb Filters ... 15
1.4.2 Sharpened Comb Filter ... 18
1.5 Anti-Aliasing ... 21
1.5.1 Alias Rejection using Comb Filters ... 21
1.6 Finite Word-Length Eff ects ... 23
1.6.1 Number Representation ... 23
1.6.2 Roundoff  Noise ... 24
1.6.3 Truncation and Rounding Errors ... 24
1.7 PTV(D)-Filter ... 26
1.7.1 Radix-r Signed Digit Number Representation ... 28
1.7.2 Quantization Error ... 31
1.7.3 Radix-3 SD Representation ... 31
1.7.4 Radix-4 SD Representation ... 32
1.7.5 The Design Flow for a PTV Filter ... 32

2 Design Environment ... 33
2.1 ED^*-Converter Structure ... 33
2.2 Digital Filter Design Flow ... 34
2.3 Proposed Realization ... 34

3 Oversampling A/D Converters ... 35
3.1 Introduction ... 35
3.2 Fundamentals ... 36
3.2.1 Stability ... 37
3.2.2 Signal-to-Noise Ratio (SNR) ... 38
3.3 Nonideal Eff ects ... 40
3.4 DelSi - Simulation Tool ... 45
3.5 The IFLF5 ED^*-Modulator ... 45
3.5.1 The Topology ... 45
3.5.2 Fully Diff erential SC Integrator ... 46
3.5.3 Input overload treatment ... 46

4 Hardware Realization ... 49
4.1 Introduction ... 49
4.2 LUT-Based Serial Distributed Multiplication ... 50
4.3 Multirate Decimation Filter ... 52
4.4 The Bit-Serial Approach for the FIR Filter Implementation in FPGAs ... 54
4.5 Modified FIR Filter in Direct Form ... 60
4.6 The Basic Building Blocks ... 60

5 Design of a One-Stage FIR Filter ... 61
5.1 Introduction ... 61
5.2 Coeffcient Quantization ... 65
5.2.1 Technique to reduce Quantization Noise ... 70
5.3 Hardware Implementation ... 73

6 Designing a Multistage FIR Filter ... 79
6.1 Introduction ... 79
6.2 Proposed Structure for this Design ... 80
6.2.1 Specifications ... 80
6.2.2 Two-Stage Decimation ... 80
6.2.3 Three-Stage Decimation ... 82
6.3 The Comb - FIR Filter Cascade ... 83
6.3.1 Realization of the First Stage ... 83
6.3.1.1 Comb Filter 5th order ... 87
6.3.1.2 Comb Filter 6th order ... 88
6.3.1.3 Comb Filter 7th order ... 90
6.3.1.4 Comb Filter 8th order ... 91
6.4 The Comb - FIR Filter Cascade Design Example 1 ... 92
6.4.1 Filter Properties ... 92
6.4.2 Hardware Requirements ... 93
6.4.3 An Modification of the Comb - FIR Filter Cascade ... 99
6.4.3.1 Filter Properties ... 99
6.4.3.2 Hardware Requirements ... 102
6.4.4 Sharpened Comb Filter ... 103
6.5 The Sharpened Comb Filter - FIR Compensator Cascade Design Example 2 ... 107
6.5.1 Filter Properties ... 107
6.5.1.1 Quatizated Coeffcients ... 113
6.5.2 Hardware Requirements ... 115
6.6 The Half-Band Filter ... 118
6.6.1 Determination of the Coeffcients ... 119
6.7 The Comb - Half-Band Filter Cascade Design Example 3 ... 123
6.7.1 The Half-Band Filter Section ... 123
6.7.2 The Front-End realized as Sharpened Comb Filter ... 131
6.8 The FIR Filter realized as a PTV Filter Structure ... 132
6.8.1 Description of the Topology ... 132
6.8.2 Hardware Requirements ... 136
6.9 Summary ... 137

7 Conclusions ... 139

A Filter Coeffcients and Matlab Files ... 141
A.1 Filter Coeffcients for Design Example 2 ... 141
A.2 m-file coeff_ trunc.m ... 146
A.3 m-file coeff_round.m ... 146
A.4 m-file design sinc2sh.m ... 147
A.5 m-file design sinc2shcomp.m ... 147
A.6 m-file design sinc3.m ... 150
A.7 m-file design hbfir.m ... 153
A.8 m-file dec2radix.m ... 155

Bibliography ... 158

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