This course is intended for second-year computer science students and aims to present the basic principles of the von Neumann machine, machine language, assembly language, as well as combinational and sequential circuits, along with practical implementation of these fundamental concepts.
A set of exercises is included at the end of each chapter.
This document is a course support material and is not intended to be comprehensive or present all the details of the topics covered. Attending the actual lectures, as well as the directed and practical work sessions, is strongly recommended.
The content of the course is essentially as follows:
- Chapter 1: von Neumann Architecture;
- Chapter 2: Machine Language;
- Chapter 3: Assembly Language;
- Chapter 4: Combinational Logic Circuits;
- Chapter 5: Sequential Logic Circuits.
Table of Contents
Introduction
Chapter 1: Von Neumann Architecture
1.1. Von Neumann Model
1.2 Basic Components of the von Neumann Machine
1.3 Central Unit
1.3.1 Central Memory
1.3.1.1 RAM : Random Access Memory
1.3.1.2 ROM : Read Only Memory
1.3.1.3 Bit
1.3.1.4 Memory Addresses
1.3.1.5 Characteristics of Memory
1.3.1.6 Memory Operations
1.3.1.7 General Functioning of Memory
1.3.1.8 RIM Register
1.3.1.9 RAM Register
1.3.1.10 Other Characteristics of Memory
1.3.2 Central Processing Unit (CPU)
1.3.2.1 Arithmetic and Logic Unit (ALU)
1.3.2.2 Control Unit (CU)
1.3.3 Input/Output (I/O) Devices
1.3.3.1 Input Devices
1.3.3.2 Output Devices
1.3.3.3 Storage Devices
1.3.4 Bus
1.3.4.1 Address Lines
1.3.4.2 Data Lines
1.3.4.3 Control Lines
Chapter 2: Machine Language
2.1 Concept of Machine Instruction (Machine Language)
2.2 Execution model
2.2.1 Memory-to-memory model
2.2.2 Memory-accumulator
2.2.3 register-register
2.2.4 Stack (IJVM of Java)
2.3 Machine instruction format
2.3.1 Instruction format without address field
2.3.2 Instruction format with a single address field
2.3.3 Instruction format with two address fields
2.3.4 Instruction format with three address fields
2.3.5 Fixed and variable length
2.3.6 Degree of complexity and time/length trade-off
2.4 Addressing modes
2.4.1 Immediate addressing
2.4.2 Direct addressing
2.4.3 Indirect addressing
2.4.4 Field structure
2.4.5 The size of each field
2.4.6 Size OPC
2.4.7 Size of the addressing mode field
2.4.8 Size of OP1
2.4.9 Size of OP2
2.5 Execution of a machine instruction
2.5.1 Execution cycle
2.6 Processor design
2.6.1 CISC Approach
2.6.2 RISC Approach
Chapter 3: Assembly Language
3.1 Introduction
3.2 Classification of Programming Languages
3.2.1 Internal Machine Language
3.2.2 External Machine Language (Assembly Language)
3.2.3 High-Level Programming Language
3.3 Presentation of the INTEL 8086 Machine and a Subset of Its Assembler
3.3.1 Physical Characteristics of the Studied Processor
3.3.2 Status Register (PSW)
3.4 Instruction Set
3.4.1 Transfer Instructions (LOAD/STORE and Between Registers)
3.4.2 Arithmetic and Logical Instructions
3.4.2.1 Addition Instruction
3.4.2.2 Subtraction Instruction
3.4.2.3 "AND" Instruction
3.4.2.4 "OR" Instruction
3.4.3 Right Shift Instruction "SHR"
3.4.4 Left Shift Instruction "SHL"
3.4.5 Comparison Instruction "CMP"
3.4.6 Control Flow Instructions
3.4.6.1 Unconditional Branch Instruction "JMP"
3.4.6.2 Conditional Branch Instructions
3.4.6.3 Loop instruction
3.4.7 Increment and Decrement Instructions "INC, DEC"
3.4.8 I/O Instructions
3.4.8.1 Read Instruction "IN"
3.4.8.2 Write Instruction "OUT"
3.4.9 Interrupts "INT"
3.4.9.1 Keyboard Input
3.4.9.2 Screen Output
3.4.9.3 Program Termination
3.4.10 Address Transfer Instruction "LEA"
Chapter 4: Combinational Logic Blocks
4.1 Logic Gates
4.2 Boolean Function Flowchart
4.3 Arithmetic Circuits
4.3.1 Half Adder
4.3.2 Full Adder
4.3.3 Half Subtractor
4.3.4 Full subtractor
4.4 Encoding and Decoding
4.4.1 Concepts
4.4.2 3-to-8 Line Decoder
4.4.3 8-to-3 Encoder
4.4.4 BCD to 7-Segment Decoder
4.5 Multiplexer (MUX)
4.5.1 MUX
4.5.2 DEMUX
4.6 Parity Generator
4.6.1 Definition
Chapter 5: Sequential Logic Blocks
5.1 Introduction
5.2 Flip-Flops
5.2.1 D Flip-Flop
5.2.2 T Flip-Flop
5.2.3 R-S Flip-Flo
5.2.4 J-K Flip-Flo
5.3 Implementation of Flip-Flops
5.4 Registers
5.4.1 Shift Register
5.4.2 Applications of Shift Registers
5.5 Counters
5.5.1 Asynchronous Modulo 2n Counters
5.5.2 Synchronous Counters
Objectives and Topics
This course book aims to introduce second-year computer science students to the foundational principles of computer architecture, covering the von Neumann model, instruction processing, and logic circuit design.
- Von Neumann machine architecture and central components
- Machine language concepts, execution models, and addressing modes
- Assembly language programming using the Intel 8086 architecture
- Design and analysis of combinational logic blocks like adders and decoders
- Sequential logic circuits including flip-flops, registers, and various counter designs
Excerpt from the Book
1.1. Von Neumann Model
The model on which current computers are based is the result of research by John von Neumann, published in 1946. Since then, the architecture of computers has remained virtually unchanged.
A computer, following the von Neumann model, consists of memory and a processor. The memory contains both data and programs. The processor's role is to sequentially fetch the instructions from memory, interpret them, and execute them one by one until the problem is solved. The data are transformed during the execution of the program through a succession of states, with the final state being the result [2].
This fundamental description highlights the structure of modern computers and how the von Neumann architecture influences the way programs are executed. It’s a timeless design that continues to power the majority of computing systems today.
Summary of Chapters
Chapter 1: Von Neumann Architecture: Provides an overview of the foundational computer model, explaining the interaction between the processor and storage.
Chapter 2: Machine Language: Details the definition of instruction sets, execution models, and the various addressing techniques used to manage data.
Chapter 3: Assembly Language: Introduces symbolic programming and the specifics of the 8086 processor, including instruction sets and interrupts.
Chapter 4: Combinational Logic Blocks: Explains the synthesis of basic digital functions using logic gates, including arithmetic, encoding, and multiplexing circuits.
Chapter 5: Sequential Logic Blocks: Covers bistable circuits, flip-flops, shift registers, and counter designs with memory capabilities.
Keywords
von Neumann architecture, CPU, Machine language, Assembly language, Instruction set, Addressing modes, Logic gates, Combinational circuits, Sequential circuits, Flip-flops, Registers, Arithmetic logic unit, Memory addressing, Binary system, Microprocessor.
Frequently Asked Questions
What is the primary focus of this course?
The course introduces second-year computer science students to fundamental principles of computer systems, ranging from machine architecture and instruction processing to digital circuit design.
What are the core topics covered in the material?
The book covers the von Neumann model, machine and assembly language, combinational logic (adders, decoders), and sequential logic (flip-flops, counters).
What is the central research question or goal?
The primary goal is to provide a comprehensive supporting document for understanding how hardware executes programmed instructions and how digital logic forms the basis of computer systems.
Which scientific methods are utilized?
The material utilizes structural analysis, Boolean algebra for logic design, Karnaugh maps for circuit simplification, and systematic classification of instruction sets.
What topics are discussed specifically in the main processing sections?
The main sections discuss the CPU's internal architecture, memory operations (read/write cycles), register functions, and the practical implementation of processor instructions.
Which keywords best characterize this work?
Key terms include computer architecture, instruction set architecture (ISA), assembly language, flip-flops, and sequential logic blocks.
What is the role of the Program Counter (PC)?
The PC is a register that holds the memory address of the next instruction to be executed and is automatically incremented during the instruction cycle.
Why are sequential circuits different from combinational circuits?
Combinational circuits depend purely on current inputs, whereas sequential circuits utilize feedback mechanisms to "remember" past inputs and states.
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- Dr. Adel Abdelhadi (Autor:in), 2025, Computer Architecture Course and Exercises, München, GRIN Verlag, https://www.grin.com/document/1574331
