Cordic core with High throughput using 90nm SAED technology

Elaboration, 2013

5 Pages, Grade: BB


AbstractCORDIC (Coordinate Rotation for Digital Computers) an economical replacement for the use of Multipliers, it is a method for computing elementary functions using minimal hardware such as shifts, adds/subs and compares. It is a fast and efficient algorithm that can be used for any type of digital signal processing architectures (Microprocessor). The latest trends in VLSI technology enhance different ways of implementing the CORDIC architecture. This work focuses on an ASIC implementation of a CORDIC architecture with a merit of reduced latency and power.

KeywordImplementation of Cordic core (rtl design,functional verification ,synthesis, physical design,gls)


For a long time the field of Digital Signal Processing has been dominated by Microprocessors. These processors are cheap and flexible they are relatively slow when it comes to performing certain demanding signal processing tasks e.g. Image Compression, Digital Communication and Video Processing. Of late, rapid advancements have been made in the field of VLSI and IC design. As a result special purpose processors with custom-architectures have come up. Higher speeds can be achieved with these customized hardware solutions at competitive costs. To add to this, various simple and hardware-efficient algorithms exist which map well onto these chips and can be used to enhance the speed and flexibility while performing the desired signal processing tasks. [1]

One such simple and hardware-efficient algorithm is CORDIC, an acronym for Coordinate Rotation Digital Computer, proposed by Jack E Volder. CORDIC uses only Shift-and-Add arithmetic with table Look-Up to implement different functions. By making slight adjustments to the initial conditions and the LUT values, it can be used to efficiently implement Trigonometric, Hyperbolic, Exponential functions, Coordinate Transformations etc. using the same hardware.


CORDIC or Coordinate Rotation Digital Computer is a simple and hardware-efficient algorithm for the implementation of various elements, especially trigonometric, functions. Instead of using Calculus based methods such as polynomial or rational functional approximation, it uses simple shift, add, subtract and table look-up operations to achieve this objective.[1]

The CORDIC algorithm was first proposed by Jack E Volder in 1959. It is usually implemented in either Rotation mode or Vectoring mode. In either mode, the algorithm is rotation of an angle vector by a definite angle but in variable directions. This fixed rotation in variable direction is implemented through an iterative sequence of addition/subtraction followed by bit-shift operation. The final result is obtained by appropriately scaling the result obtained after successive iterations. Owing to its simplicity the CORDIC algorithm can be easily implemented in a VLSI system.

CORDIC algorithm is commonly used in those applications

where area is a primary constraint. The processing elements performing vector rotations can efficiently implement all the elementary functions without using any multiplier. The operations like addition, subtraction, bit shift and lookup table

are involved in this algorithm. It is well suited for VLSI implementations due to its simplicity.

For any design, high throughput is one of the most desired

attribute. Along with the high throughput, power reduction can also be obtained by including any of the low power techniques without any increase in the cost like reduce signal integrity.

2.1 Advantage

- Hardware requirement and cost of CORDIC processor is less as only shift registers, adders and look-up table (ROM) are required
- Number of gates required in hardware implementation are minimum as hardware complexity is greatly reduced compared to other processors such as DSP multipliers
- It is relatively simple in design
- No multiplication and only addition, subtraction and bit-shifting operation ensures simple VLSI implementation.
- The delay involved during processing is comparable to that during the implementation of a division or square-rooting operation.

Either if there is an absence of a hardware multiplier or there is a necessity to optimize the number of logic gates CORDIC is the preferred choice.

2. 2 Disadvantage:

- Large number of iterations required for accurate results and thus the speed is low and the time delay is high
- Power consumption is high in some architecture types

2.3 Application

- The algorithm was basically developed to offer digital solutions to the problems of real-time navigation in B-58 bomber .
- John Walther extended the basic CORDIC theory to provide solution to and implement a diverse range of functions.
- This algorithm finds use in 8087 Math coprocessor, the HP-35 calculator, radar signal processors, and robotics.
- CORDIC algorithm has also been described for the calculation of DFT, DHT, Chirp Z-transforms, filtering, Singular value decomposition, and solving linear systems.

Most calculators especially the ones built by Texas Instruments and Hewlett-Packard use CORDIC algorithm for calculation of transcendental functions.

III. Working of cordic core:

CORDIC stands for Coordinated Rotation DIgital Computer. It was initially a special purpose digital computer for real-time aircraft navigation. [2][3]

It has come to stand for the method embodied in this computer.

Let we see one example to get generalize idea of how actually cordic working.

- The sin of 128 degrees is the y-coordinate of the result of rotating the vector (1,0) through 128 degrees and that can be efficiently computed as a composition of rotations through smaller angles:
- 128 ~ 90 + 45 - 22.5 + 11.2 + 5.7 - 2.9 + 1.5 - 0.8 and these rotations can be very efficiently computed.

The number of steps required to reach at the point (128) it’s called the iterations.

illustration not visible in this excerpt

As shown in figure to reach the vector V5 cordic core algorithm takes 5 iterations V1-> V5.

Cordic algorithm:CORDIC algorithm can be employed in two different modes, namely rotation mode and vectoring mode.[2][3]

- The idea of CORDIC algorithm is to approximate the desired rotation angles through a series of deflected angle which is fixed and is relevant to do the base operation.
- This algorithm reduces the computation to addition, subtraction and bit shifts. Hence the CORDIC algorithm operates by decomposing the desired angle into the weighted sum of a set of predefined elementary rotation angles such that the rotation through them canbeaccomplished with simple shift and adds operations. The angle θ can be represented as shown in below,
-=∑αidi (i=0 to n-1)

- Here di is the parameter that decides the sign, i.e., di = ± 1 .The elementary angle is denoted as αi. The rotating vector is chosen to be a unit vector. After n iterations it will contain cosαn and sinαn as its first and second components respectively. From the vector rotation of Fig.1 we can derive two sets of equation for x and y component.


Excerpt out of 5 pages


Cordic core with High throughput using 90nm SAED technology
Gujarat University  (GTU PG School)
M.E(vlsi and embedded system design)
Catalog Number
ISBN (eBook)
File size
611 KB
rtl design, functional verification, synthesis, physical design, gls
Quote paper
Hemal Nayak (Author), 2013, Cordic core with High throughput using 90nm SAED technology , Munich, GRIN Verlag,


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