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Seminar Paper, 2018
16 Pages, Grade: 1.0
Convolutional Neuronal Nets (CNNs) are state-of-the art Neuronal Networks, which are used in many fields like video analysis, face detection or image classification. Due to high requirements regarding computational resources and memory bandwidth, CNNs are mainly executed on special accelerator hardware which is more powerful and energy efficient than general purpose processors. This paper will give an overview of the usage of FPGAs for the acceleration of computation intensive CNNs with OpenCL, proposing two different implementation alternatives.
The first approach is based on nested loops, which are inspired by the mathematical formula of multidimensional convolutions. The second strategy transforms the computational problem into a matrix multiplication problem on the fly. The approaches are followed by common optimization techniques used for FPGA designs based on high level synthesis (HLS). Afterwards, the proposed implementations are compared to a CNN implementation on an Intel Xeon CPU in order to demonstrate the advantages in terms of performance and energy efficiency.
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